module tb_shifter;
    
    reg clk, rst;
    reg [1:0]in_a, in_b;
    wire[1:0] out;
    
    initial
    begin
        clk = 0;
        rst = 1;
        in_a = 0;
        in_b = 0;
        #5 rst = 0;
        #5 rst = 1;
    end
    
    always #10 clk = ~clk;
    always #15 in_a = $random;
    always #20 in_b = $random;
    
    shifter shifter1(
                   .clk(clk),
                   .rst(rst), 
                   .in_a(in_a), 
                   .in_b(in_b), 
                   .out(out)
                   );

endmodule
