÷ г Backlight  Discrete Cosine Transform (Methodologies for Backlight control and Discrete Cosine Transform for Display panel)

  

ý Ȳ õ ȭ ν ü ý (Development of bad weather image quality enhancement, recognition and precision actuator system for long distance image surveillance)

õ ȭ ˰ Ű (Algorithm and architecture for bad weather image quality enhancement and image data compression)

LCD backlight dimming پ ǥ ȭ (Image quality enhancement based on LCD backlight dimming and various image metric optimizations)

ȿ BLU dimming Ģ DCT/IDCT Codec  ȭ, Display System on Panel (High image quality, low power Display System on Panel design with efficient BLU dimming and regular DCT/IDCT Codec)

ȭ Ʈ LED (Backlight unit LED design for optimum image quality)

ȭ LCD BLU ȿ (Efficient LCD BLU control methodologies for image enhancement)

Display Panel ȭ ó ˰ (Arithmetic algorithm development for display panel image enhancement)

System on Panel Fault tolerant Data Management Unit Parallel Built in Self Testable Image Compression Memory (Fault tolerant Data Management Unit and Parallel Built in Self Testable Image Compression Memory for System on Panel)

DCT, Coprocessor, DMU, Parallel BIST Image Buffer  System on Panel(SOP) Platform (System on Panel (SOP) Platform Design Methodologies with DCT, Coprocessor, DMU and Parallel BIST Image Buffer)

Data Manipulation Fault Tolerant DCT ̿ SOP ȭ ޸ ȿ (An Efficient SOP frame memory storage methodology using data manipulation and fault tolerant DCT)

LTPS TFT ̿ ȭ, ȸ, ýۿ ȸ ݱ (Circuit design technologies for LTPS TFT pixel driving system)

ͽ Ʈũ ý ǹɷ (Development of curriculum and teaching methodology for improving practical design techniques on ubiquitous wireless network systems)

TFT-LCD Display Panel SOP Processor Scaling (Processor Scaling methodologies for TFT-LCD Display Panel SOP)

÷ Ŭ (÷ ȭ ϵ о) (Cluster for Advanced Information Displays with Enhanced Human Sensibility Ergonomics)

Coprocessor Fault Detection Routine  ȿ Redundancy Replacement (Efficient Methodology for Redundancy Replacement with Coprocessor Fault Detection Routine)

ITа (IT curriculum reform support project)

к -÷ о űԱ -н (Electronic and Electrical Engineering – basis-the new curriculum and teaching for the high-tech association-learning development)

TFT-based ý architecture fault-tolerant processor (Design Technology Development of TFT-based system Architecture and Fault-tolerant processor)

Faulty Bit DRAM BIST (Design of high density DRAM BIST with easy location of faulty bits)

CMOS ̵ Transceiver Ĩ ý (CMOS mobile communication transceiver chip and system)

Multimedia coprocessor ȿ interface (Optimal control and interface methodologies for multimedia coprocessor)

ȭó general purpose signal processor (Design of Signal processor execution unit in excellent picture and sound information processing)

Shape adaptive ̻ ȯ VLSI (Shape adaptive Discrete Cosine Transform VLSI implementation)

Ž ˰ ̿ μ VLSI Ű (VLSI Architecture Design and Implementation Study of the motion estimation processor using a hierarchical search algorithm)

μ 𵨸 (Custom о) (Processor modeling and verification technology research (Custom Design Areas))

Ư DSP ɺ ̺귯 ( ϵ ̺귯 ) (Specially developed DSP function blocks and libraries (Motion estimation hardware function block library and development)

VLSI Motion Estimation ˰ 񱳺м (Comparison of Motion Estimation Algorithm for VLSI Implemention)

ȭ ó general purpose signal processor (High-level design of the superior general purpose signal processor for high-speed image processing)

̺귯 ġ Ÿн (Cell libraries complement and integer arithmetic unit data path design)

Constant Geometry Discrete Cosine Transform μ VLSI ˰  (VLSI Algorithm and Architecture for Constant Geometry Discrete Cosine Transform)

ȭó general purpose signal processor (High-level synthesis of high speed general purpose)

Fractional-pel Ȯ Ȯ μ VLSI

(Fractional-pel accuracy motion compensation have scalable processor VLSI Design)

̺귯 (Study on cell library building)

16-bit Microcontroller (16-bit Microcontroller design)

ǽð ó full Search Block matching VLSI μ (The design of real-time high speed full search block matching VLSI Motion compensation processor)

constant geometry FFT processing element chip (Implementation of a two - dimensional constant geometry FFT processing element chip)

HDTV Motion compensation VLSI Ű (VLSI Architecture and Circuit Design for HDTV)

̵ſ ȣȭ Ŀ (Study on the digital audio encoding system for mobile communication)

FFT μ VLSI ˰ Ű (VLSI algorithm and architecture for the FFT processor)

TV ȣȭ ý (Implementation Study for encoding high-definition TV)

Constant Geometry 2-D FFT VLSI ˰ ߰ Ű (VLSI algorithm and architecture development for Constant Geometry 2-D FFT)

 

(High band width) DRAM Ʈѷ (The structure and design of high-speed controller (High band width) DRAM)